The Balanced AND Logic Gate

I have been replacing Sudoku with this problem of the odd and even logic gates.

It is rather complex to implement using two transistors.

I have found a circuit topology which allows the even logic gate, the new AND...

The EVEN conditions:
Two switches on = light on
Two switches off = light on
One switch on other off = light off

I needed to use one NPN transistor and one PNP. Feedback loops were used to design the logic gate using only two transistors.

Now I need to implement the EI (either) logic gate. A few more days of puzzles over coffee and I might have two balanced logic gates designed using only two transistors each (rather than eight).